Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/239719
Title: Dynamically reconfigurable Network on Chip for fault elimination without affecting the Communication between the nodes
Researcher: Gowda K . Shilpa
Guide(s): K. R. Rekha
Keywords: Engineering and Technology,Engineering,Engineering Electrical and Electronic
University: Jain University
Completed Date: 04/10/2018
Pagination: 102 p.
URI: http://hdl.handle.net/10603/239719
Appears in Departments:Department of Electronics Engineering

Files in This Item:
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certificate.pdfAttached File195 kBAdobe PDFView/Open
chapter 1.pdf800.78 kBAdobe PDFView/Open
chapter 2.pdf477.65 kBAdobe PDFView/Open
chapter 3.pdf3.26 MBAdobe PDFView/Open
chapter 4.pdf828.54 kBAdobe PDFView/Open
chapter 5.pdf801.2 kBAdobe PDFView/Open
chapter 6.pdf470.25 kBAdobe PDFView/Open
cover page.pdf99.73 kBAdobe PDFView/Open
table of contents.pdf283.52 kBAdobe PDFView/Open


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