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Title: Network on chip NOC implementation for 3D network topological structure in HDI environment
Researcher: Jain, Arpit
Guide(s): Sharma, Sanjeev and Gahlot, Alok
Keywords: 3D network
Engineering and Technology,Computer Science,Computer Science Software Engineering
Network on chip
University: Teerthanker Mahaveer University
Completed Date: 2018
Abstract: File attached
Pagination: 130 p.
Appears in Departments:Department of Computer Science and Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File36.25 kBAdobe PDFView/Open
02_dedication.pdf336.85 kBAdobe PDFView/Open
03_certificate.pdf332.02 kBAdobe PDFView/Open
04_declaration.pdf433.06 kBAdobe PDFView/Open
05_acknowledgement.pdf337.36 kBAdobe PDFView/Open
06_abstract.pdf221.12 kBAdobe PDFView/Open
07_content.pdf482.79 kBAdobe PDFView/Open
08_chapter 1.pdf519.49 kBAdobe PDFView/Open
09_chapter 2.pdf545.84 kBAdobe PDFView/Open
10_chapter 3.pdf608.11 kBAdobe PDFView/Open
11_chapter 4.pdf1.12 MBAdobe PDFView/Open
12_chapter 5.pdf680.08 kBAdobe PDFView/Open
13_chapter 6.pdf3.1 MBAdobe PDFView/Open
14_chapter 7.pdf357.48 kBAdobe PDFView/Open
15_references.pdf494.97 kBAdobe PDFView/Open
16_appendix.pdf11.19 MBAdobe PDFView/Open

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