Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/225969
Title: Low Power Test Architecture for Fault Detection in SRAMs
Researcher: Vikram Singh Takher
Guide(s): Rahul Raj Choudhary and Sushila
Keywords: Engineering and Technology,Engineering,Engineering Electrical and Electronic
University: Vivekananda Global University
Completed Date: 2019
Abstract: newline
Pagination: 
URI: http://hdl.handle.net/10603/225969
Appears in Departments:Department of Electronics and Communication

Files in This Item:
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certificate.pdfAttached File423.44 kBAdobe PDFView/Open
chapter 1.pdf223.69 kBAdobe PDFView/Open
chapter 2.pdf332.89 kBAdobe PDFView/Open
chapter 3.pdf363.49 kBAdobe PDFView/Open
chapter 4.pdf336.02 kBAdobe PDFView/Open
chapter 5.pdf380.15 kBAdobe PDFView/Open
chapter 6.pdf103.24 kBAdobe PDFView/Open
preliminary pages.pdf1.72 MBAdobe PDFView/Open
publication.pdf203.57 kBAdobe PDFView/Open
references.pdf148.08 kBAdobe PDFView/Open
title.pdf250.15 kBAdobe PDFView/Open


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