Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/192270
Title: Analog Low Noise Amplifier Circuit Design and Optimization
Researcher: Hasmukh P Koringa
Guide(s): Vipul A Shah
Keywords: RF CMOS LNA, Noise figure, Inductive degenerative LNA, UWB, Impedance matching , S parameters
University: Gujarat Technological University
Completed Date: 05-10-2017
Abstract: newline The design of RF frontend for the next generation wireless communication is one of the emerging areas of research in field of RFIC. In 2002 Federal Communication Committee (FCC) had released 3.1 - 10.6 GHz Ultra Wideband (UWB) for commercial purpose with two restriction, low power transmission (Emission Isotropic Radiated Power must be lower then -41.3 dBm/MHz) and 500 MHz minimum bandwidth. These restrictions put stringent requirements on designing of UWB receiver. Overall sensitivity and noise figure of receiver is dominated by the first amplifier block of receiver known as Low Noise Amplifier (LNA). Due to very large 7.5 GHz wide bandwidth UWB technology has desirable features such as less multipath fading, good range and time resolution, high data rate and easier material penetration. The UWB technology is widely use in image penetration, high data rate short distance wireless communication, high accuracy locating and positioning and medical applications. Most challenging task in implementation of UWB technology is to design LNA for UWB receiver. Realization of UWB receiver requires wideband matching, high power gain, low noise figure and good linearity LNA. newlineIn this thesis proposed design of 3.1 - 10.6 GHz wideband high power gain Low Noise Amplifier for UWB receiver. Common Gate (CG) configuration of amplifier is used in the first stage of UWB LNA design for wideband input impedance matching. Input impedance and Noise Figure (NF) of the CG are analyzed and optimized to improve performance of the LNA. The gain of design is improved by using cascode Common Source (CS) stages after CG. NF and power gain of the design are improved by using inductive load in each stage. Overall wideband high flat gain is achieved by resonate each stage parallel tune circuit at different frequencies of interested band. This novel multistage UWB LNA design provides very high power gain, low noise figure, wideband input impedance matching and good linearity in interested 3.1 10.6 GHz wideband. newlineSimulate
Pagination: 
URI: http://hdl.handle.net/10603/192270
Appears in Departments:Electronics & Telecommunication Enigerring

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01_title.pdfAttached File120.54 kBAdobe PDFView/Open
02_certificate.pdf266.39 kBAdobe PDFView/Open
03_abstract.pdf194.8 kBAdobe PDFView/Open
04_declaration.pdf5.1 kBAdobe PDFView/Open
05_acknowledgement.pdf86.04 kBAdobe PDFView/Open
06_contents.pdf99.65 kBAdobe PDFView/Open
07_list_of_tables.pdf109.46 kBAdobe PDFView/Open
08_list_of_figures.pdf234.35 kBAdobe PDFView/Open
09_abbreviations.pdf87.39 kBAdobe PDFView/Open
10_symbols.pdf99.58 kBAdobe PDFView/Open
11_chapter1.pdf309.6 kBAdobe PDFView/Open
12_chapter2.pdf508.18 kBAdobe PDFView/Open
13_chapter3.pdf607.77 kBAdobe PDFView/Open
14_chapter4.pdf2.09 MBAdobe PDFView/Open
15_chapter5.pdf906 kBAdobe PDFView/Open
16_chapter6.pdf1.46 MBAdobe PDFView/Open
17_chapter7.pdf200.9 kBAdobe PDFView/Open
18_references.pdf329.57 kBAdobe PDFView/Open
19_bibliography.pdf194.08 kBAdobe PDFView/Open


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