Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/186704
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dc.coverage.spatial
dc.date.accessioned2018-01-08T10:19:40Z-
dc.date.available2018-01-08T10:19:40Z-
dc.identifier.urihttp://hdl.handle.net/10603/186704-
dc.description.abstractnewline IN THESIS
dc.format.extent206
dc.languageEnglish US
dc.relation
dc.rightsuniversity
dc.titleSTUDY OF GRAPHENE BASED PLANNER INTERCONNECTS FOR NANO SCALE VLSI
dc.title.alternative
dc.creator.researcherAgnihotery, Praggya
dc.subject.keywordGRAPHENE, NANO, VLSI
dc.description.note
dc.contributor.guideAgarwal,R.P.
dc.publisher.placeMeerut
dc.publisher.universityShobhit University
dc.publisher.institutionFaculty of Electronics, Informatics and Computer Engineering
dc.date.registered11-04-2014
dc.date.completed2017
dc.date.awarded25/11/2017
dc.format.dimensions
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Faculty of Electronics, Informatics & Computer Engineering

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