Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/180761
Title: Design and implementation of area and power efficient architecture for signed multipliers
Researcher: Stalin, Priya
Guide(s): Arun, C
Keywords: architecture
Design
multipliers
power
University: St. Peters University
Completed Date: 2017
Abstract: Available Abstract
Pagination: n.d.
URI: http://hdl.handle.net/10603/180761
Appears in Departments:Department Of Electrical and Electronics Engineering

Files in This Item:
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01_title.pdfAttached File23.96 kBAdobe PDFView/Open
02_declaration.pdf9.07 kBAdobe PDFView/Open
03_certificate.pdf9.16 kBAdobe PDFView/Open
04_acknowledgement.pdf9.96 kBAdobe PDFView/Open
05_abstract.pdf29.68 kBAdobe PDFView/Open
06_contents.pdf29.64 kBAdobe PDFView/Open
07_chapter 1.pdf512.23 kBAdobe PDFView/Open
08_chapter 2.pdf494.86 kBAdobe PDFView/Open
09_chapter 3.pdf807.72 kBAdobe PDFView/Open
10_chapter 4.pdf928.67 kBAdobe PDFView/Open
11_chapter 5.pdf148.05 kBAdobe PDFView/Open
12_chapter 6.pdf1.22 MBAdobe PDFView/Open
13_chapter 7.pdf373.89 kBAdobe PDFView/Open
14_references.pdf47.4 kBAdobe PDFView/Open


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