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Researcher: A, Satheesh
Guide(s): D Kumar
Keywords: Network Processor, self-configuration, Dynamic Code Deployment, control plane, data process, NePSim, ALS, microengine, energy estimation, network traffic, M/M/C with Kolmogorov Differential Equation
University: Periyar Maniammai University
Completed Date: 2015
Abstract: Network Processors (NPs) are programmable multi-processor devices that offer both the flexibility and speed required for the network packet processing applications. The performance of NP depends on the design of data plane and control plane processing and computing resources to meet speed requirement of the processor. As the traffic fluctuations are inherent in packet networks, the workload on each pipeline stage in NP may vary significantly over time. To handle the fluctuating workloads many approaches are being made. This sets the objective to make NP to handle the non-uniform traffic mix so that improved effectiveness in processor utilization and energy conservation of NPs can be achieved. To improve the effectiveness of Intel IXP2400 NP, the thesis proposes to develop Self-Configuration method, Adaptive Load Sharing (ALS) method and Dynamically Reconfigurable Queue model. newlineThe proposed self-configuration method enables network elements to readjust themselves in the event of network traffic or service requirement that allows the network processor to continue operation during runtime rather than the baseline configuration that exist presently. The task of self configuring network processor constitutes both control plane and data plane processing operations. Self configuring the network processor takes place through dynamic code deployment and the code is written in Embedded C language and incorporated in the XScale processor. newlineTo make decision on when to perform reconfiguration, the traffic is monitored and its statistics are maintained. Moreover, active network concept is used for reconfiguring the system, wherein the binary code is transferred to the NP through the SOAP protocol. The XScale core in the IXP2400 device is to provide control functions, while data processing such as packet forwarding, packet classification, payload processing and security operations are performed by microengines in the IXP2400 device. Thus this work demonstrates the integration of control plane and data processing opera
Pagination: 193 p.
Appears in Departments:Department of Computer Science and Engineering

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04_acknowledgement.pdf56.54 kBAdobe PDFView/Open
05_contents.pdf104.13 kBAdobe PDFView/Open
06_chapter 1.pdf297.02 kBAdobe PDFView/Open
07_chapter 2.pdf783.99 kBAdobe PDFView/Open
08_chapter 3.pdf314 kBAdobe PDFView/Open
09_chapter 4.pdf1.16 MBAdobe PDFView/Open
10_chapter 5.pdf607.1 kBAdobe PDFView/Open
11_chapter 6.pdf711.2 kBAdobe PDFView/Open
12_chapter 7.pdf182.75 kBAdobe PDFView/Open
13_appendix a.pdf308.33 kBAdobe PDFView/Open
14_appendix b.pdf288.4 kBAdobe PDFView/Open
15_appendix c.pdf262.12 kBAdobe PDFView/Open
16_references.pdf547.76 kBAdobe PDFView/Open
17_publications.pdf65.37 kBAdobe PDFView/Open

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