Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/127633
Title: Quantum Modeling of Silicon on Insulator Nanoscale Double Gate Field Effect Transistor
Researcher: Rajiv Sharma
Guide(s): Shail Bala Jain and Sujata Pandey
Keywords: 
University: Guru Gobind Singh Indraprastha University
Completed Date: 04/2013
Abstract: In the recent years, the development of VLSI technology is mainly due to the newlineminiaturization of semiconductor devices which, in turn, is heavily dependent on the newlineadvancement of the Field-Effect Transistor (FET) technology. As the channel length newlineof conventional planar metal oxide semiconductor field effect transistor shrink into newlinethe nanometer regime, performance of the devices becomes degraded mainly because newlineof short channel effects that arise due to weakened gate control. The Silicon-on- newlineInsulator Nanowire Field Effect Transistor with multiple gates around the silicon newlinechannel that can significantly improve the gate control are considered to be promising newlinecandidates for the next generation transistors and have drawn considerable attention newlinerecently. In addition to the effective suppression of short channel effects, the SOI newlineNanoscale MOSFET with multiple gates shows excellent current drive and they are newlinealso compatible with conventional CMOS processes. newlineThin film Silicon-on-insulator (SOI) technology has become an increasingly active newlineresearch area offering potential advantages over bulk silicon technology for high newlinespeed digital circuit applications. SOI technology offers several advantages such as newlineimproved radiation hardness, reduced parasitic capacitances, higher packing density newlineand possible applications at higher temperature. In addition to this Silicon-oninsulator newline(SOI) MOS devices are given much attention owing to their advantages of newlinehigher circuit speed, greater immunity to radiation induced errors, lower power newlineconsumption, attenuated short channel effects and compatibility with existing IC newlinefabrication process. newlineThe FETs can further be used to design digital circuits where the performance of the newlineoverall circuit can be measured in terms of on-off characteristics and speed of the newlineoverall circuit. In addition to digital circuits, Double-Gate SOI MOSFETs can also be newlineused in analog RF wireless communication applications.
Pagination: 
URI: http://hdl.handle.net/10603/127633
Appears in Departments:University School of Engineering and Technology

Files in This Item:
File Description SizeFormat 
01_coverpage.pdfAttached File25.56 kBAdobe PDFView/Open
02_certificate.pdf11.09 kBAdobe PDFView/Open
03_acknowledgement.pdf13.42 kBAdobe PDFView/Open
04_abstract.pdf30.76 kBAdobe PDFView/Open
05_toc.pdf15.95 kBAdobe PDFView/Open
06_list of figures.pdf35.81 kBAdobe PDFView/Open
07_symbols.pdf29.63 kBAdobe PDFView/Open
08_abbreviation.pdf12.24 kBAdobe PDFView/Open
09_publications.pdf19.16 kBAdobe PDFView/Open
10_chapter_01.pdf213.63 kBAdobe PDFView/Open
11_chapter_02.pdf168.62 kBAdobe PDFView/Open
12_chapter_03.pdf154.68 kBAdobe PDFView/Open
13_chapter_04.pdf157.13 kBAdobe PDFView/Open
14_chapter_05.pdf419.46 kBAdobe PDFView/Open
15_chapter_06.pdf2.27 MBAdobe PDFView/Open
16_chapter_07.pdf18.06 kBAdobe PDFView/Open
17_references.pdf51.91 kBAdobe PDFView/Open
18_appendices.pdf146.34 kBAdobe PDFView/Open
19_biodata.pdf11.08 kBAdobe PDFView/Open


Items in Shodhganga are protected by copyright, with all rights reserved, unless otherwise indicated.